In a memory device comprising a controller and a nonvolatile memory controlled by the controller, an operation for erasing data stored in the nonvolatile memory is executed by the erase algorithm of a plurality of loops to reduce a voltage stress applied to a memory cell. Each loop includes an erase step for applying an erase pulse and a verify step for verifying the threshold voltage of the memory cell after the erase step. The erase pulse is increased in proportion to the loop count. The above erase algorithm is terminated in the loop in which erasing is completed.